more fully.
zcd is NOT particularly useful for this project since it cannot drive a timer gate directly or be a capture source for any of the pic chips that my crusty old version of proteus can...
i'm guessing the signal is impressed on to the power line in a "balanced" phantom cailho style. i don't know how to simulate that or how to extract it properly either in any simple way with proteus ....
Thanks Richard, appreciate the effort but (always a but)....
If I'm not reading the sim setup wrong (which I might) you have a +/-3V signal sitting on a DC-bias of 32V when, in reality, it is a...
if you drive a voltage divider after the dc blocking capacitor? You will have a predefined dc level to consider as "0 volts" for the comparator I guess.
i have zero experience with zcd module but reading the blurb it seems to bias the pin to about 0.7 ish volts. the signal is applied through a suitable R, so that when the signal goes negative the...
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Re: FSK demodulator in firmware
more fully.
richard - 13th October 2025, 05:48zcd is NOT particularly useful for this project since it cannot drive a timer gate directly or be a capture source for any of the pic chips that my crusty old version of proteus can...