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Recent Forum Posts

Re: K42 and Timer Interrupts

Thanks for the explanation.

I misinterpreted these paragraphs. My understanding was to have ASYNC cleared and use Fosc/4.

Ioannis
Ioannis - 28th April 2025, 19:28

Re: K42 and Timer Interrupts

The SYNC block uses FOSC/4 as its sync clock, so it's difficult to use it if it's using FOSC/4 as its input source for counting too.

9966

for 16-bit read/write see sec 20.1.1.1:

9965

In...
tumbleweed - 28th April 2025, 18:11

Re: K42 and Timer Interrupts

Sure it is. Inside the ISR, Timer 0 is stopped, reloaded and restarted.

I think is it obligatory to use Fosc/4. Unless I misunderstood the DS. Then why is it necessary to use ASYNC=1? Could...
Ioannis - 28th April 2025, 17:35

Re: K42 and Timer Interrupts

Two things...

Since you're using FOSC/4 as the source, set ASYNC bit in T0CON1.

Also, when using 16 bit mode (MD16=1) you should always write TMR0H then TMR0L in that order so that the high...
tumbleweed - 28th April 2025, 00:25

Re: K42 and Timer Interrupts

looks like not reloading the tmr count every ms....... after first int, tmr counter looping from 0 .....???
amgen - 27th April 2025, 22:54

Re: K42 and Timer Interrupts

Tried the files and indeed it worked OK. Sort off...

I tried to setup the Timer 0 as 16bit timer, cloked by Fosc/4 with system clock at 64MHz.

Reload value $C187

The toggle happens every 4...
Ioannis - 27th April 2025, 18:34

Re: K42 and Timer Interrupts

Thanks Richard.

Ioannis
Ioannis - 27th April 2025, 16:26

Re: K42 and Timer Interrupts

sheldon sent me these for a project i was assisting with. it all seemed to work
richard - 27th April 2025, 00:47

K42 and Timer Interrupts

I wonder if anyone managed to work with DT-INTS18 with the K42 series chips.

The latest DT_INTS-18_K42c.bas file that tumbleweed posted (on this closed thread...
Ioannis - 26th April 2025, 11:58

Community Competitions

General Competition rules

Published on - 23rd January 2011 09:33

Competitions are subject to the privacy policy and website terms and conditions of picbasic.co.uk, owned and controlled by Crownhill Associates Limited (“Crownhill”).
The following rules shall apply, together with any instructions or rules specific to any current competition. By entering any of the community run competitions, you are deemed to have accepted the following: ...

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COMMON DEVELOPMENT AND DISTRIBUTION LICENSE (CDDL)

Published on - 23rd January 2011 10:14

Common Development and Distribution License (CDDL) is a free software license, produced by Sun Microsystems, based on the Mozilla Public License (MPL), version 1.1.

http://www.opensource.org/licenses/cddl1.php ...

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The Microchip name and logo

Published on - 23rd January 2011 10:22

The Microchip name and logo, PIC, dsPIC, KEELOQ, MPLAB, PICmicro, PICSTART, rfPIC and UNI/O are registered trademarks of ...

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