if you drive a voltage divider after the dc blocking capacitor? You will have a predefined dc level to consider as "0 volts" for the comparator I guess.
i have zero experience with zcd module but reading the blurb it seems to bias the pin to about 0.7 ish volts. the signal is applied through a suitable R, so that when the signal goes negative the...
Thanks Richard,
I had actually read Romans article but, thankfully, my signal never shows two simultanouse tones - it's always one or the other which makes it easier.
I don'know - author on the link above used timer3.
I guess, mechanically changing it to timer1 or 2 won't work, since there's some ASM code involved...
why timer3 ?
any timer that can provide a 10mS interrupt could be employed, the self configuring aspect of the code will not function for modern pic chips. the code will need a tickle to adapt it...
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Re: FSK demodulator in firmware
if you drive a voltage divider after the dc blocking capacitor? You will have a predefined dc level to consider as "0 volts" for the comparator I guess.
Ioannis Today, 14:11Ioannis