Pot jitters during ADC capture


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  1. #1
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    Default Re: Pot jitters during ADC capture

    I'm looking at this post:

    https://electronics.stackexchange.co...c-analog-input


    I have 3 slide pots, so I found a quad op-amp OPA4314 at JLCPCB:

    https://wmsc.lcsc.com/wmsc/upload/fi...WR_C129333.pdf


    Interesting stuff. This never came up in my research to debounce a pot. They quickly lose me when they talk about frequencies and Nyquist. I'm assuming this relates with audio. I'm just sampling a pot and wouldn't know how to tweak that R/C combo.

    The R/C combo here is WAAAAY lower:

    https://electronics.stackexchange.co...t-input-to-adc


    Found an explanation on how to chose the R/C combo between a buffer and ADC here:

    https://electronics.stackexchange.co...-an-adc-input:


    It points to a TI note that suggests 100R/1nF for the OPAx365 (in the image). I'm assuming this is an excellent starting point; TI describes it as "ideal for driving sampling analog-to-digital converters (ADCs)".

    https://wmsc.lcsc.com/wmsc/upload/fi...BVR_C96626.pdf


    Only available in single and dual, but still relatively cheap (from what I expected, I'm just happy it's available at JLCPCB).
    Last edited by Demon; - 8th August 2024 at 02:38.
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  2. #2
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    Default Re: Pot jitters during ADC capture

    a voltage follower amp is really only a benefit if the signal source impedance is so high that the adc input loads the signal so much to make it inaccurate. it will not smooth out a crappy pot if anything it may accentuate it.
    a lowpass filter will help whether its analog pre adc or digital post adc will make little difference
    right now I'm working with FSR'S [force sensitive resistors] with 200k to 500k resistances on a pic 16f18426
    no problem what so ever

    what do the pots perform like when measured on a ohmmeter [an analog one would be ideal]
    if they are really that bad then the resolution achievable will be low no matter how you go about it
    especially if there are dead spots
    Last edited by richard; - 8th August 2024 at 04:09.
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  3. #3
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    Default Re: Pot jitters during ADC capture

    Richard has good point regarding crappy source signal.

    As noted before, if the pot is so bad it will be very difficult to clean the signal.

    The r-c values depend on the signal frequency that they will filter. Your pot signal is really slow and needs big cap and resistor values, called time constant.

    Having big r-c values driving Adc is difficult so a buffer is needed.

    Ioannis
    Last edited by Ioannis; - 8th August 2024 at 11:59.

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    Default Re: Pot jitters during ADC capture

    robert states
    Tried shifting out low 4 bits.


    ...mostly stable
    that means the pot resistance must vary in leaps of over 160 ohms [assuming correct technique]
    no amount of lpf will be useful in getting stable readings from "fine" movements under those conditions
    Warning I'm not a teacher

  5. #5
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    Default Re: Pot jitters during ADC capture

    Well, yes. Tossing lower 4 bits of 10 total means clearly that the source signal is too bad to be useful. If Robert insist on using those pots, then based on the fact that the wiper moves slowly, he should have a really big time constant on the R-C network to compensate for the "noise". And then he should also add buffers with such high Pot and R-C values. All these add extra cost. Better chose a better pot and done with it.

    Ioannis

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    Default Re: Pot jitters during ADC capture

    Quote Originally Posted by Demon View Post
    Interesting stuff. This never came up in my research to debounce a pot.
    Maybe because you do not debounce a pot but only a switch or push button. Pots are filtered in the rare case of noise. Usually are rock stable and with a couple of averaging there is no problem.

    Ioannis

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    Default Re: Pot jitters during ADC capture

    Not that it matters much but I'm reading revision H of the datasheet. It's what Microchip currently serves on their website:
    https://www.microchip.com/en-us/prod...document-table

    Name:  Datasheet.PNG
Views: 1995
Size:  75.1 KB

    But as have been said, it should not make that much of a difference in this case.

  8. #8
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    Default Re: Pot jitters during ADC capture

    Yes you are right Henrik. The only problem with the low impedance is that the reading of the ADC will have more error. But the jitter is a different matter.

    In any case I am surprised that the ADC has such a low input impedance. Was taking for granted that all PIC are in the range of 10K...

    Ioannis

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