confusion with the CD74HC165 8 bit register

[lerameur]

Tim,
How do you invert the CE signal with the PL pin. Do you direct connect both pins with an inverter? I guess my hardwireing is wrong...

K

[lerameur]

putting the PL low .. something like that ??

TRISE = %11111100 	' Set PORTE to all input
            
Clock   var PORTE.0   'CP
Load    var PORTE.1   'PL
Data_1  var PORTE.2  'Q7  out
input1 var byte
             
Mainloop:

low Load
pulsout Load,10
shiftin Data_1,Clock,0,[input1 \8]
	lcdout $FE,1, "Shift in"
	lcdout $FE,$C0, dec2 input1
	pause 300
	
	
			
GOTO Mainloop
End

[HenrikOlsson]

No, the other way around...it must idle HIGH. It should always be HIGH except for that moment you want to "capture" the 8 databits. Put a HIGH Load before your mainloop, the Pulsout command will then pulse it low for you.

[falingtrea]

putting the PL low .. something like that ??

I would do this (and make sure the CE pin is pulled low always) :

TRISE = %11111100 	' Set PORTE to all input
            
Clock   var PORTE.0   'CP
Load    var PORTE.1   'PL
Data_1  var PORTE.2  'Q7  out
input1 var byte

low Load
             
Mainloop:

  high Load
  shiftin Data_1,Clock,0,[input1 \8]
  low Load

  lcdout $FE,1, "Shift in"
  lcdout $FE,$C0, dec2 input1
  pause 300
			
GOTO Mainloop
End

[lerameur]

Hi I just tried your program modification and it do not work. Also some people say here it should be high and you say it should always be low, this is confusing.

'/////////////////////////
'//  test program
'//	Using the PIC16F887
'/////////////////////////

'/////////////////////////
'// Define section //
'/////////////////////////
include "modedefs.bas"

OSCCON = %01110000 '8 Mhz
DEFINE OSC 8
ANSELH = 0


'/////////////////////////
'// LCD configuration //
'/////////////////////////

DEFINE LCD_DREG PORTB 	' Set LCD Data port
DEFINE LCD_DBIT 4 		' Set starting Data bit (0 or 4) if 4-bit bus  RB.4, RB.5, RB.6, RB.7
DEFINE LCD_RSREG PORTB 	' Set LCD Register Select port
DEFINE LCD_RSBIT 1 		' Set LCD Register Select bit
DEFINE LCD_EREG PORTB	' Set LCD Enable port
DEFINE LCD_EBIT 0 		' Set LCD Enable bit
DEFINE LCD_BITS 4 		' Set LCD bus size (4 or 8 bits) '4 therefore put wire at 4, 5, 6 and 7 of LCD
DEFINE LCD_LINES 2 		' Set number of lines on LCD
DEFINE LCD_COMMANDUS 2500
DEFINE LCD_DATAUS 250
DEFINE CHAR_PACING 2000
pause 500


TRISE = %11111100 	' Set PORTE to all input
            
Clock   var PORTE.0   'CP
Load    var PORTE.1   'PL
Data_1  var PORTE.2  'Q7  out
input1 var byte

low Load
             
Mainloop:

  high Load
  shiftin Data_1,Clock,0,[input1 \8]
  low Load

  lcdout $FE,1, "Shift in"
  lcdout $FE,$C0, dec2 input1
  pause 300
			
GOTO Mainloop
End

[lerameur]

Hum, I tried pretty much every combination with High, Low PL, Pauses, whatever I could think about. Change HC165, maybe it could be defect. Nothing, still showing Zero as my output.

K

[mackrackit]

Can you post a schematic?

[lerameur]

Hi Dave, I can do that, maybe tomorrow, Its only using three ports in my Pic16F887, how hard can it be. I tried to switch to PORTD:
Clock var PORTD.0 'CP
Load var PORTD.1 'PL
Data_1 var PORTD.2 'Q7 out
But no luck either Maybe the CD4014BE will be easier ??

ken

[falingtrea]

Tim,
How do you invert the CE signal with the PL pin. Do you direct connect both pins with an inverter? I guess my hardwireing is wrong...

K

That is how I did it. Mode 0 looks like the proper one to select.

But, because of the way the PL signal works (CLK disabled if PL is low), you could wire the CE low and just use the PL signal to control operation. Just set PL high before you execute the SHIFTIN command and set it low after the command is finished.