Hi T.Jackson. I will try it out tomorrow. I think it is caused by configuring the VREF+ and VREF-. I configured them as VREF+=Vdd and VREF-=Vss. So I think this why the negative sinusoidals are truncated. But in spite of this I think the A/D module must work. I don't have a chance to change the offset voltage to 2,5 volts as you offered. But I think can figure this out with VREF+=AN2 and VREF-=AN3 by pulling AN2 to +2,5 volt and AN3 to -2,5 volt.
Here is the code I used:
W0 VAR WORD
TRISA.0 = 1 ' Set pin 0 of PORTA an input
TRISA.1 = 0 ' Set pin 1 of PORTA an output
PORTA.1 = 0 ' Clear pin 1 of PORTA
ADCON0 = %00000001 ' Configuring Analog Channel Select bits, A/D
' Conversion Status bit, A/D On bit
ADCON1 = %00001110 ' Configuring Voltage Reference Configuration bits,
' A/D Port Configuration Control bits
ADCON2 = %10010000 ' Configuring A/D Result Format Select bit (Right justified ),
' A/D Acquisition Time Select bits (4 TAD), A/D Conversion
DEFINE OSC 4
DEFINE ADC_BITS 10
DEFINE ADC_CLOCK 1
DEFINE ADC_SAMPLEUS 11
Conversion:
ADCON0.1 = 1 ' Set GO/(DONE)' bit. Wait the Automatic Acquisition Time and Start Conversion
PAUSEUS 50
IF ADCON0.1 = 0 THEN ADC_BIT_RECEIVING
IF ADCON0.1 = 1 THEN Conversion
ADC_BIT_RECEIVING:
ADCIN 0,W0
W0.0 = PORTA.1
PAUSEUS 10
W0.1 = PORTA.1
PAUSEUS 10
W0.2 = PORTA.1
PAUSEUS 10
W0.3 = PORTA.1
PAUSEUS 10
W0.4 = PORTA.1
PAUSEUS 10
W0.5 = PORTA.1
PAUSEUS 10
W0.6 = PORTA.1
PAUSEUS 10
W0.7 = PORTA.1
PAUSEUS 10
W0.8 = PORTA.1
PAUSEUS 10
W0.9 = PORTA.1
END
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