Will Interrupts affect on chip eeprom writing?

[MOUNTAIN747]

Art, I would add one more thing,

@ BCF INTCON, GIE
Write EEPROM...................................
@ BSF INTCON, GIE

should do the trick if using interrupts durring a Write to EEPROM.
Wayne

[Art]

Art, I would add one more thing,

@ BCF INTCON, GIE
Write EEPROM...................................
@ BSF INTCON, GIE

should do the trick if using interrupts durring a Write to EEPROM.
Wayne

I tried this, and all appears ok so far

[Darrel Taylor]

With all the quotes from the manual and datasheet, I thought for sure someone would have seen ...

The following DEFINE turns interrupts off and then back on within a
WRITE command. Do not use this DEFINE if interrupts are not used in the
program.

DEFINE WRITE_INT 1

The difference being that it is built-in to the WRITE command.

Interrupts only need to be disabled during the "unlock" sequence written to EECON2 which takes 5 instructions.
@ 4Mhz, that's only 5uS, @ 20Mhz it's 1uS.

By wrapping the WRITE command with GIE=0 / GIE=1, you are disabling interrupts for the full time it takes to complete the WRITE to EEPROM.
@ any OSC, that's 4-6mS.

Many interrupts can be lost in that much time.

[sayzer]

Just for the note.

I also had same issue as Art.
DEFINE WRITE_INT 1 did not solve the issue, but GIE solved.

BTW; I am also using
@ INT_DISABLE RX_INT
before the write command and then enable it.
Only by itself it did not work, DEFINE WRITE_INT 1 also did not work.
Disabling GIE worked.

[Darrel Taylor]

Sayzer,

How long ago was your issue?
And was your issue with WRITE or WRITECODE?

WRITE_INT was introduced in PBP 2.50, but it was only for the WRITE command.
In 2.60, WRITE_INT was extended to the WRITECODE command.

I've done many interrupt programs as you can imagine.
WRITE_INT has always worked for me.

If you have code that demonstrates a problem with WRITE_INT, no less than 3 people will be involved in fixing it immediately.

EDIT: Using WRITE or WRITECODE inside a PBP type INT_Handler doesn't count.

[sayzer]

EDIT: Using WRITE or WRITECODE inside a PBP type INT_Handler doesn't count.

Does that mean that PBP type INT_Handler causes the problem that I and Art faced ?

If yes, it does not solve the problem anyway, am I right? (if we call this as a problem though)

Edit: How should I decide which type should I use? when, why? based on what criteria? Please.

[Darrel Taylor]

No, that's not what it means at all...

You cannot use the WRITE command in an ASM type interrupt, because it's a PBP statement.

When you use DEFINE WRITE_INT, GIE is turned back on during the WRITE command.
If you have a WRITE command inside a PBP type ISR, GIE is turned on in the middle of the ISR, the stack hasn't been popped by a retfie, and the chip immediately interrupts again, quickly overflowing the stack.

If you are using DEFINE WRITE_INT, you should never have a WRITE command inside the ISR.
If you are using WRITE in your ISR, you should not use DEFINE WRITE_INT.

Since interrupts cannot be interrupted (except low priority on 18F's), interrupts don't need to be disabled during a WRITE in the ISR anyhow.

If you only have WRITE statements in your your main program, it's best to use DEFINE WRITE_INT, not wrap it with GIE=0/GIE=1.