TMR0 Confusion

[HenrikOlsson]

Hi,

Now I note you cant stop/start TMR0 I dont think that's a major issue in my application which is generating a 2khz pwm.

You can't stop TMR0 when its in timer mode but you can switch it from timer- to counter mode which, as long as you don't have a any pulses coming on the T0CKI pin, will have the same effect as stopping it. As always YMMV but it's a "trick" that might work.

/Henrik.

[retepsnikrep]

Hi,

You can't stop TMR0 when its in timer mode but you can switch it from timer- to counter mode which, as long as you don't have a any pulses coming on the T0CKI pin, will have the same effect as stopping it. As always YMMV but it's a "trick" that might work.

/Henrik.

That's sneaky!!

[Darrel Taylor]

With Timer0 on 16F's, there's no reason to stop the timer while reloading since it's an 8-bit timer.

With 16-bit timers there is the slim possibility that the lowbyte will overflow to the highbyte at the same time you are reloading it.
But that can't happen with an 8-bit timer, so just reload the 8-bit value and don't worry about it.

[retepsnikrep]

Thanks it's working on the bench now just need to check my TMR0 calculations.

Using http://eng-serve.com/pic/pic_timer.html I get a prescaler of 1/4 and preload of 6 giving 500us interrupts (2khz) so that gives me 250 ticks per cycle with 8mhz clock.

That works out at 2.5ticks per 1% duty.
So for 10% duty I need to load 25 + 6 into TMR0 for the 90% off part of the cycle? and 225 + 6 for the 10% on part of the cycle?
Does that look sound right?

So my modified code looks like this.

    TMR0_ON_TICKS = DutyCycle           '(DutyCycle must be between 25 - 225 (10-90%)
    TMR0_OFF_TICKS = 250 - TMR0_ON_TICKS
    TMR0_ON_VAL = 250 - TMR0_ON_TICKS + 6
    TMR0_OFF_VAL = 250 - TMR0_OFF_TICKS + 6

[retepsnikrep]

Although this appears to be working in my application I'm confused by

PEIE var INTCON.6 'Peripheral Interrupt enable

(Does this need to be on for TMR0 interrupt?) I currently have it enabled.

I understand PEIE needs to be enabled for TMR1 but TMR0?

[retepsnikrep]

Appears not as seems to be working without it set?

[Darrel Taylor]

In the Interrupts section of the datasheet (under SPECIAL FEATURES OF THE CPU), there is a diagram that shows the Interrupt Logic.

Only the peripherals in the red box are affected by PEIE.