i am finding some other issues with bank access with other asm code i have , that is not happy on q43
thinking that what you did with
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movf BSR, 0
banksel INT_Priority_Reg
bsf INT_Priority_Reg, INT_Priority_Bit
movwf BSR
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historic code i use for elasped timer to get the cycles constant and limited may now work against q43 chip ??
i may be wrong as my asm really sucks but each command that has BCF will need a banksel , bsf ????
having trouble with load of timer1 using asm on the q43
but doing that change would add cycles i am sure
i hope i am wrong
Code:ASM ; 16.368mhz tcxo = 61.0948ns clock 16.00Mhz = 62.5 ( internal osc used currenlty 20/2/20) TimerConst = 40912 ; 40912 + 8 cycle instrution load = 40920 x 61.0948ns = 2.499999216mS timer 1 clock tick ( 16mhz int = 39992 + 8cycle = 40000 x 62.5ns = 2.5ms) TimerConst = 65536 - TimerConst ; set value for timer1 preload ;----------------- ADD TimerConst to TMR1H:TMR1L ------------------------- ADD2_TIMER macro BCF T1CON,TMR1ON, 0 ; 1 Turn off timer MOVLW LOW(TimerConst) ; 1 ADDWF TMR1L,F, 0 ; 1 BTFSC STATUS,C ; 1/2 INCF TMR1H,F, 0 ; 1 MOVLW HIGH(TimerConst) ; 1 ADDWF TMR1H,F, 0 ; 1 endm ; ----------------- ADD TimerConst to TMR1H:TMR1L and restart TIMER1 ------ RELOAD_TIMER macro ADD2_TIMER BSF T1CON,TMR1ON, 0 ; 1 Turn TIMER1 back on (8 cycles) endm ; ----------------- Load TimerConst into TMR1H:TMR1L ---------------------- LOAD_TIMER macro MOVE?CT 0, T1CON,TMR1ON MOVE?CB 0, TMR1L MOVE?CB 0, TMR1H ADD2_TIMER endm ENDASM




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