From the datasheet.

5.4.1 TWO-SPEED START-UP MODE
CONFIGURATION
Two-Speed Start-up mode is configured by the
following settings:
• IESO (of the Configuration Word 1) = 1; Internal/
External Switchover bit (Two-Speed Start-up
mode enabled).
• SCS (of the OSCCON register) = 00.
• FOSC<2:0> bits in the Configuration Word 1
configured for LP, XT or HS mode.
Which I take to mean that SCS has to be 00 for Two-Speed Start-up to work. I am not certain this is the same as

Bit 1-0 of OSCCON is for two-speed start-up. If internal is selected in the config, two-speed start-up is disabled.
This section of the datasheet is the source of the issue

5.2.2.1 HFINTOSC
The High-Frequency Internal Oscillator (HFINTOSC) is
a factory calibrated 16 MHz internal clock source. The
frequency of the HFINTOSC can be altered via
software using the OSCTUNE register (Register 5-3).
The output of the HFINTOSC connects to a postscaler
and multiplexer (see Figure 5-1). One of nine
frequencies derived from the HFINTOSC can be
selected via software using the IRCF<3:0> bits of the
OSCCON register. See Section 5.2.2.7 “Internal
Oscillator Clock Switch Timing” for more information.
The HFINTOSC is enabled by:
• Configure the IRCF<3:0> bits of the OSCCON
register for the desired HF frequency, and
• FOSC<2:0> = 100, or
• Set the System Clock Source (SCS) bits of the
OSCCON register to ‘1x’.
Which as I read it states either set FOSC<2:0> = 100 or SCS to '1x' but not both. Yet in the code

Code:
#CONFIG
        __CONFIG _CONFIG1, _FCMEN_OFF & _FOSC_INTOSC & _WDTE_OFF & _MCLRE_OFF & _CP_ON & _IESO_OFF & _BOREN_OFF & _PWRTE_OFF
        __CONFIG _CONFIG2, _PLLEN_OFF & _STVREN_OFF & _LVP_OFF
#ENDCONFIG

DEfine  OSC 4 
OSCCON = %01101010   'sets the internal oscillator to 4Mhz
Both are set.

Obviously the code works and setting SCS to '1x' is having no detrimental effect in this case. Am I interpreting the datasheet wrong?