16LF1824 strange problem

[EarlyBird2]

"not that it matters in this case and simply to further understanding." I beg your pardon? When using the internal oscillator, "OSCCON" register is the only way to select the internal oscillator speed. Unless it is set it will default to 500Khz.

I am asking a question not stating anything why say "I beg your pardon?" did I say something wrong.

You are correct Dave, about the speed did I say otherwise?

The question is why are there two methods to select the internal oscillator and what is the difference. In the code FOSC is used to select the internal oscillator and also OSCCON is used to select the internal oscillator.

[mackrackit]

FOSC in the configs tells the type of oscillator used. In this case internal.

OSCCON sets the speed of the internal with bits 6-3.

Bit 1-0 of OSCCON is for two-speed start-up. If internal is selected in the config, two-speed start-up is disabled.

[EarlyBird2]

From the datasheet.

5.4.1 TWO-SPEED START-UP MODE
CONFIGURATION
Two-Speed Start-up mode is configured by the
following settings:
• IESO (of the Configuration Word 1) = 1; Internal/
External Switchover bit (Two-Speed Start-up
mode enabled).
• SCS (of the OSCCON register) = 00.
• FOSC<2:0> bits in the Configuration Word 1
configured for LP, XT or HS mode.

Which I take to mean that SCS has to be 00 for Two-Speed Start-up to work. I am not certain this is the same as

Bit 1-0 of OSCCON is for two-speed start-up. If internal is selected in the config, two-speed start-up is disabled.

This section of the datasheet is the source of the issue

5.2.2.1 HFINTOSC
The High-Frequency Internal Oscillator (HFINTOSC) is
a factory calibrated 16 MHz internal clock source. The
frequency of the HFINTOSC can be altered via
software using the OSCTUNE register (Register 5-3).
The output of the HFINTOSC connects to a postscaler
and multiplexer (see Figure 5-1). One of nine
frequencies derived from the HFINTOSC can be
selected via software using the IRCF<3:0> bits of the
OSCCON register. See Section 5.2.2.7 “Internal
Oscillator Clock Switch Timing” for more information.
The HFINTOSC is enabled by:
• Configure the IRCF<3:0> bits of the OSCCON
register for the desired HF frequency, and
• FOSC<2:0> = 100, or
• Set the System Clock Source (SCS) bits of the
OSCCON register to ‘1x’.

Which as I read it states either set FOSC<2:0> = 100 or SCS to '1x' but not both. Yet in the code

#CONFIG
        __CONFIG _CONFIG1, _FCMEN_OFF & _FOSC_INTOSC & _WDTE_OFF & _MCLRE_OFF & _CP_ON & _IESO_OFF & _BOREN_OFF & _PWRTE_OFF
        __CONFIG _CONFIG2, _PLLEN_OFF & _STVREN_OFF & _LVP_OFF
#ENDCONFIG

DEfine  OSC 4 
OSCCON = %01101010   'sets the internal oscillator to 4Mhz

Both are set.

Obviously the code works and setting SCS to '1x' is having no detrimental effect in this case. Am I interpreting the datasheet wrong?

[richard]

best way to view it
from the data sheet

bit 1-0 SCS<1:0>: System Clock Select bits
1x = Internal oscillator block
01 = Timer1 oscillator
00 = Clock determined by FOSC<2:0> in Configuration Word 1.

when FOSC<2:0> = 100 is equivalent to 1x = Internal oscillator block ie they both set the same option (logical or )

but watch out if you want the pll engaged