My point was that the code in red stopped it working and I could not work out why it was there.
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the code in red just wastes time ,it's not what stopped the program from working . the problem is the changing sfr's in the wrong bank.
Quote:
bsf INTCON,7 ;GIE = 1
bsf INTCON,6 ;PEIE = 1 Enable peripheral interrupts
bsf PIE1,0 ; TMR1IE= 1 Enable TMR1
intcon bits 6 and 7 should already be set , setting them again should do no harm
pie1.0 is also set , setting it again can't hurt
it just wastes 12 cpu cycles
the problem lies elsewhere, PWM_VAL must be > 30 ,values from 0-29 wont work could that have happened
That is exactly what I thought and could not find anything to indicate otherwise in the datasheet.Quote:
intcon bits 6 and 7 should already be set , setting them again should do no harm
pie1.0 is also set , setting it again can't hurt
No I started PWM_VAL for zero and incremented up in steps of 1 and it worked all the way rolling over and starting from 0. If 0-29 does not work I could not detect it with my voltmeter.Quote:
the problem lies elsewhere, PWM_VAL must be > 30 ,values from 0-29 wont work could that have happened
just tried your "red" code in the isr on a pic18f45k20
you are right
bsf INTCON,6 ;PEIE = 1 Enable peripheral interrupts
bsf PIE1,0 ; TMR1IE= 1 Enable TMR1
these two lines lock it up. can't see why yet
it looked harmless but its not ,its much worse than useless
NI'm using a cro those <30ish pwm's cause the output pin to be permanently high when you expect a very small pw , in real life that could be nastyQuote:
o I started PWM_VAL for zero and incremented up in steps of 1 and it worked all the way rolling over and starting from 0. If 0-29 does not work I could not detect it with my voltmeter
try a loop range yourself of 0 to say 28
The point of coming here is to learn and I am now comparing the architecture of the 18F452 and the 16F1827. They are completely different, not surprise there.
I have found the sfrs are in bank 5 on the 16F1827 but I have no idea how to use this information.
CALLS TO ASM always set bank 0
pbp has a macro you can use "chk?rp sfr" it will ckeck that the appropriate bank is set (see status or bank sfr)
the mpasm assembler can also do a " BANKSEL SFR"
BEFORE YOU RETURN T0 PBP YOU MUST SET BANK BACK TO BANK 0
not on a cro
using a main loop like this
MAIN:
PWM_VAL = PWM_VAL+1
PAUSE 500
if pwm_val > 29 then pwm_val=0
toggle portd.1
Goto MAIN
oscilloscope
depending on your age , in the old days a cathode ray oscilloscope, cro for short
the 30 figure came from the pic16f1825 using dt_ints14
for a pic18f45k20 the figure is 25 using dt_ints18
for a pic18f45k20 using DEFINE INTHAND the figure is 11
seems dt_ints introduces more latency
point is 0 is not off and pwm < latency is not a small pw
Thanks :)
Yes, you're right.
My first version was like you, did not work. To better understand the problem I have added including red lines.
I tried again and the result is the same version. In the start-up process produces two pulses and then stops.
I installed the PBP trial version 3.0.7 to try. Nothing's changed. Error 113 continues (Post 56, I wrote 103, it's wrong)
Attachment 7424Attachment 7424
Hi,
Check your spelling of CCPR1H and CCPR1L.
/Henrik.
Hi,
Henrik, congratulations for being careful, thank you.
This is a completely copy-paste disaster :)
Talat