HPWM Confusion in spec sheet

[skimask]

ANSEL= Control the functions, has analog input bit select, so select the port you want to have input, ... Ok not complicated so far

Almost, not quite.
ANSEL controls the FUNCTION of the pin selected. It sets the FUNCTION of the pin as either digital or analog.

ADCON0=Controls the operations (bits 5:3) analog channel select bit, eee didn't I choose my analog ports in already in ANSEL? I am not sure about this section. Also it allows only for one port setting at a time. Therefore I cannot use two analog port at the same time ? doesn,T make sense

Correct, you can only SAMPLE one analog port into ADRES (the result register) at a time, but you can SAMPLE all analog ports sequentially by changing the channel...

ADCON1= Controls the functions , I have one question about this. bit3:0 are unimplemented (Read as zeros the specsheet says) . What does that mean?
The reason I ask is I keep seeing people adding 1's in these bits
example: http://www.picbasic.co.uk/forum/show...t=ADCON1+16f88
ADCON1 = %10000010

why bother putting a 1 in bit 1 if it is going to be read as zero, Am I missing something ?

In other chips, those bits might be implemented for something else. And if you read a bit farther down in that thread ( and a little bit between the lines ), you'll see that the poster of that thread really didn't understand those register's functions either.

[lerameur]

Correct, you can only SAMPLE one analog port into ADRES (the result register) at a time, but you can SAMPLE all analog ports sequentially by changing the channel...

How would you go about having 3 port using the A/D command ?
I would need to redefine the ADCON0 in the program ?
begin:
ADCON0 = %10000 000 'read channel AN0
...program goes here
ADCON0 = %10001 000 'read channel AN1
...program goes here
ADCON0 = %10110 000 'read channel AN6
goto begin

(keeping in mind to turn off and on the A/D module each time ADCON0 is selected)

K

[lerameur]

Also,

the 7'th bit (ADFM) of the ADCON1 REGISTER identifies left and right justification. Although in the pic16f88 spec sheet, page 119, figure 12-4 (A/D result justification) the answer of left or right justification BOTH are in 10 bit length.

So why is it that when we put ADCON1 =%00000000 means Left justified results in 8 bits ??

[skimask]

Also,

the 7'th bit (ADFM) of the ADCON1 REGISTER identifies left and right justification. Although in the pic16f88 spec sheet, page 119, figure 12-4 (A/D result justification) the answer of left or right justification BOTH are in 10 bit length.

So why is it that when we put ADCON1 =%00000000 means Left justified results in 8 bits ??

The A/D result can go into the 16 bit combined register ADRESH and ADRESL.
10 bits of A/D go into 16 bits of result...
Left justify goes into the upper 10 bits, right justify goes into the lower 10 bits.
But if you're using the ADCIN command, and you've defined a byte as the result, the variable used in ADCIN will hold the upper byte of the result from the ADC, which if you have it right justified, won't work too well.
If you've defined a word as the result of the ADCIN, then the 10 bits of the AD result will go into that word, depending on where the justify bit is set.