That is interesting. I setup a simple test sending serial data to an F876A.

With the USART set for 9600bps, sending data to it at 300bps, it sets FERR, and reading RCREG has absolutely no affect on FERR.

Only receipt of a valid character at the correct baud rate (when no overrun condition is present) clears the FERR bit.

The reason Microchip mentions reading RCREG "AND" receiving a valid character to clear the framing error is because if you don't read RCREG first, and it's full, the USART can't receive any new characters, and the framming error can't be cleared.

Reading RCREG doesn't clear the error. It just clears OERR which inhibits transfer of inbound data from SSR to RCREG, and the ability to receive a valid character that's going to clear the framing error.

Unless I were going to use hardware hand-shaking or flow control, I wouldn't even bother with monitoring the framing error bit.