18F2550 timing


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  1. #1
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    How far off is it?
    If you did this...
    Code:
    main:
    high LED
    pause 500
    low LED
    pause 500
    goto main
    What do you end up with as far as timing goes? Should be a 1 second pulse, 1/2 on, 1/2 off, obviously...

  2. #2
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    I ran the test you suggested and here's what I found out:

    18F2550 with a 20MHz xtal, HS, postscaler (/2), DEFINE OSC 20
    makes 1ms into 4ms, which is what works perfectly for my situation.

    18F2550 with 20MHz xtal, HSPLL, any possible postscaler, any possible DEFINE OSC
    can't make 1ms into 4ms.

    I would need to use either a higher than possible DEFINE OSC statement or a larger postscaler option. For example, DEFINE OSC 64 with postscaler (/6) would work but 64 isn't compiling.
    A postscaler which is (/8) could help too but it's not an option.

    Seems I should just use a different xtal. I could get that same 1ms becomes 4ms situation if I use a 12MHz or 24Mhz xtal for this circuit. Are 12 and 24 equally usable? Maybe 12 would be better because less noise?

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    Quote Originally Posted by sstt1976 View Post
    18F2550 with 20MHz xtal, HSPLL, any possible postscaler, any possible DEFINE OSC can't make 1ms into 4ms.
    Like I said before, you can't run a 20Mhz xtal into the HSPLL! The PIC is probably running on the backup internal oscillator (add some code to check for the oscillator fail bit and see what it reads back).

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    Quote Originally Posted by skimask View Post
    Like I said before, you can't run a 20Mhz xtal into the HSPLL!
    18F2550 ... Sure you can.

    Just need to setup the right divisors in the config's.
    <br>
    DT

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    Quote Originally Posted by Darrel Taylor View Post
    18F2550 ... Sure you can.

    Just need to setup the right divisors in the config's.
    <br>
    There I am thinking about the '4685 again. Can't run 20Mhz into it and expect the PIC to run 80Mhz...
    (and I was just about to go back and change it too)

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    The datasheet says 20MHz is okay to go into HSPLL. You just use a /5 prescaler and the resulting 4MHz is then used to produce a fixed 96MHz PLL reference clock.

    What I can't configure however is the 4x slower operation (I want 'pause 1' to actually pause for 4ms!).

    I just wanted to see if i could pull this timing thing off without having to use a different xtal. I started everything with 20MHz HS but now that I'm forced to use HSPLL, which is new to me, I know 20 won't work so I'm done with it. The reason I'm moving to HSPLL is because my circuit only enumerates consistently on PC's but not Mac's, unless I use HSPLL instead of HS.

    I'm sure both 12 and 24 will work but is there any preference?...unless there is some other way to get the timing I want and still use the 20MHz xtal!

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    Actually, it doesn't seem possible no matter what value I choose. Using HSPLL and also somehow getting the program to run 4 times slower is tougher than I thought. Now I will probably start experimenting with changing my ADC_SAMPLEUS value as well as all my PAUSE and PAUSEUS statements...

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    Why do you want PAUSE 1 to pause for 4mS? Can't you just use PAUSE 4?

    Note you do not have to use HSPLL. With a 20MHz osc you can set the PLL divisor to
    /5, USBDIV /2, and the USB core will run at 48MHz. You can set FOSC = HS and set the
    CPU divisor to CPUDIV = OSC1_PLL2 and use DEFINE OSC 20.
    Regards,

    -Bruce
    tech at rentron.com
    http://www.rentron.com

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    The PAUSE was just an example. I need every instruction and every aspect of the program to run 4 times slower than normal.

    I already was using HS as you suggested and everything was fine, except enumeration would not carry out through a USB hub into a Mac. It worked in every other condition, PC and Mac. When I use HSPLL it enumerates every time in any situation. Unfortunately, my program works best 4 times slower than it does at normal speed, which was very possible using HS in the scenario I outlined above, but not possible so far using HSPLL.

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