I think for the actual project im going to use vdd because the potential divide part can change its value to make use of the full 5V (i dont have any outputs 5V or less).

The frequency is 50Hz (UK AC) but because its DC ripple i guess that makes it 100Hz. As i said before im going to only take the highest value. If i sample it at about 400 times a second then at least one sample will be extremely close to the absolute max. Because of DC ripple it also has 2 chances per second to get as close as possible. I can then discard all the lower readings. The highest value will be reset after each 400 samples so it can detect a drop in current.

Im not sure if a PIC chip can check the ADC chanels that fast though. I might need a higher resonator. If using 10-bit then the chip can detect 1024 different voltage levels. At 5V max each level is 4.8828125mV. As long as the input value is within 4.8828125mV of the highest point in the DC ripple i should get an accurate reading. The good thing about DC ripple (or any kind of sinewave based line) is that it stays near the top for a longer period of time than any other point in the wave but still i might need more than 4 sample points on each bump. To make it even worse the pic chip will have to deal with 8 ADC pins. It might be an idea to split the work between multiple PICs