I2C Read and Write

[falingtrea]

Well, I did a search for a 24LC84 and could not find a data sheet anywhere. What size is this part? If it is bigger than 32 kbits, then it probably needs a word size value for mem_off. For your ram_lo data I think you should mask off the upper byte by and'ing MyWordWrite and MyWordRead with 0xFF. Or use the .lowbyte and .highbyte modifiers. In fact, I don't see size definitions for any of your variables. Is mem_off a byte or word variable? Is ram a byte or word array? What are F05 and F10 defined as?

[DerekMacom]

First of all sorry it was a typo.... it trying to talk to a 24LC64.

I am switching the ADC off with ADCON1 = $07, been caught with this one before. Though in this project I'm reading one of the ADC channels, so this might be worth a look.

Fuse setting's are all default apart from HS PLL enabled.

[JD123]

Is the "mem_off" variable word size? The 24C64 uses a word sized address. Your variable "mem_off" is being sent as the address. Also, just asking, but you do have the A0:A2 pins on the IC grounded for the device address "1010000", right?

Your lines:

ram[F05_HI] = MyWordRd/256 'This register can be read over modbus
ram[F05_LO] = MyWordRd

are a bit odd and are going to run up a lot of code space. I'd use:

ram[F05_HI] = MyWordRd.Highbyte
ram[F05_LO] = MyWordRd.Lowbyte

[falingtrea]

Alright let's try some simple things. Are the A0, A1,and A2 pins are tied to ground or VCC? These address pins also need to be correctly selected in the control byte. For the control byte you are using they should be all grounded. Is the WP pin floating or connected to gnd?

You definately need some way of waiting 10 msec between writing and reading or you will get a NACK from the part and no read data. Also, if you want to use interrupts to manage the serial port, you will probably have to write your own serial port interrupt routine. The PB code is not really interrupt driven itself. From the PBP manual:

"Since PBP statements are not re-entrant (PBP must finish the statement that is being executed before it can begin a new one) there could be considerable delay (latency) before the interrupt is handled."

edit: Like minds, eh JD??

[JD123]

Seems so, Tim. I didn't notice the lack of a 10ms pause though. Good catch.