your are quite right Alain.but, good exercise to have a reflexion about what offers the chip as features ...
I have taken a very big step away from the bench for a while now, (just can’t seem to get the level of concentration back).
There are so many ways of achieving a result that sometimes I have had difficulty seeing through the “liminal”. And by that I mean the mental area where I can unnecessarily execute a task in PBP that can be completed very simply using the inbuilt features of a PIC, and Visa-versa
Approaching a problem from a PIC perspective or PBP Perspective. And I haven’t started on peripheral components.
So it is really valuable to have a reflection
I am in a mental state where I am looking at code and circuits and simply cannot believe they are mine, what they are for and why I build them in the first place. I am finding it quite depressing.
Anyway, I am hijacking a thread again, so back to it,
On a 252 I might set an interrupt on the two comparators (single interrupt only inbuilt I think) for each channel that I wish to monitor and use that interrupt event to start one timer with a preload and interrupt on overflow…..Whilst……. using the other two CCP and associated timers to capture all the events on the two channels.
So I might have THREE consecutive lines starting each of the three timers, just as Alain suggested
If the events on the two CCP channels are very close together and are triggered before the reset/write is completed then consider a PIC with more Timers that can be associated with the CCP’s so that each subsequent trigger on a particular channel uses a different timer.
Is every edge being triggered (random pulses) or is it looking at a frequency. So much of this is application specific.
Duncan
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