Quote Originally Posted by TonyA View Post
Does a 4021B shift register (slave) receive latch and clock data in a standard (fixed) way? Or does this rely on how the latch and clock data are being sent from the master?
Datasheets for the 4021 should tell you all you need to know...about the 4021.
I guess the main thing would be to 'scope out what the NES is sending out, figure out how fast it's going, what it's logic levels are, and so on.

You said I would "tie up" the pic doing this. If that's true than maybe I'll skip this and just use a pic to send the parallel input into a real shift register, then out to the master.
Shiftin/Shiftout are both 'blocking' commands. You can't do anything else until the commands are done executing because it's all done in software.
If you used the MSSP module in a PIC, you could just punch a byte to the TX register, hit a bit to send it, and go about your business. When you have another byte to send out, check the busy bit, if it's good, send another byte. The MSSP does all the clocking and shifting in hardware.

I was thinking about using a pot via ADCIN and then send the shifted out serial bits based on the pot reading. Would that work with shiftin and shiftout going on as well?
Depends...on the time it takes to read the pot, how fast shiftin/shiftout run, among other things...
You could start the ADC, shiftout a byte. By the time a byte is shifted in or out, the ADC would be finished and ready for a read. Then restart the process...