I have yet to get involved with the hardware issues of I2C ports on PICs, so this may be no help, but who's doing the clocking during the read from the slave to the master? Is it setup in the slave I2C to allow for the master to provide the clock? Again, I'm not able to know for sure what you've done with the hardware since I'm not familiar with those registers.

In my bit-banging I2C (current project) I've locked down the I2C transfers by failing to deal with the acknowledges correctly and ill timed stop commands after a "last byte" read. I don't know how PBP deals with this read issue, but a correct stop command comes after a reading device does not send an acknowledge (after reading the last byte), else the sending I2C drives the SDA line with the next bit of data. This can mess up the master’s ability to issue the stop command.

Also, I noted in the PBP manual this:

I2CREAD and I2CWRITE can be used to read and write data to a serial EEPROM with a 2-wire I2C interface such as the Microchip 24LC01B and similar devices. This allows data to be stored in external non-volatile memory so that it can be maintained even after the power is turned off. These commands operate in the I2C master mode and may also be used to talk to other devices with an I2C interface like temperature sensors and A/D converters.