strange problem ! pic18f4550 & pic16f84a serial communication .

[leelion]

Hi
Thanks , I tested PLLDIV = 4 before I posted .
if set PLLDIV = 4 , its output around 16.8ms , do you think any other setting was wrong ?

Best regards
Lee

[richard]

if set PLLDIV = 4 , its output around 16.8ms

The input to the PLL needs to be 4MHz , 16/4 = 4

CPUDIV = OSC1_PLL2 yields a 48MHz CPU clock if the PLL is fed correctly

do you think any other setting was wrong ?

If you don't post you code [in code tags] I would only be guessing