Clock (Pulse) Input is on RB6, T1OSC must be disabled. See Figure 7-2.

T1CON=%00000111

See Register 7-1 as to why.

TMR1 will interrupt when it rolls from $FFFF thru to $0000, so for 4000 counts preset the counter (Registers TMR1H & TMR1L) with $F060 ($0000-$0FA0). That means you'll get 4000 counts ($0FA0 Counts) before it interrupts.

Your Interrupt Service Routine must reset TMR1 back to $F060 after each interrupt (as well as resetting the appropriate interrupt Flag)..

I’ll let you sort out the configuration of INTCON (see section 12-10, INTCON Register 2-3, PIE1 Register 2-4 and PIR1 register 2-5) – after all, you’ve got to do something…

Tip: If you interrupt every 400 rather than every 4000 counts, you'll be able to count increments of tenths of a mile - not just miles.

Depending on the latency of your program, several pulses may have been counted after an interrupt has been generated before you get around to servicing the interrupt. Use a similar technique to that described in the Olympic Timer example to account for the extra pulses so none get missed.

Melanie