Memory

[BrianT]

I have many PICs in a peer to peer network and they all swap messages between each other. This requirement is a simple version of that.

I would use a handshake line that each device checks before reading or writing. You could monitor SDA and SCL but these are dynamic and a snapshot may look like no activity when in fact it is busy.

I would have four 4k7 from Vcc to the two PIC SDA and SCL lines plus two 4k7 from supply to the contention pins on each PIC. When not wanting access to the memory, the SDA, SCL and the contention pin are set as inputs so they are all pulled high by the resistors. When a device wants memory access it checks that the contention line is high (no activity state) then pulls it low and starts the SDA, SCL memory data exchange. When the message is over the sending PIC returns all lines to inputs and they are pulled high ready for the next data transfer.

During debugging you can be certain that both PICs will fight and so use series limiting resistors wherever there is a direct PIC to PIC connection. 470 Ohms will do it.

HTH
Brian