Thanks Tenaja and Skimask. Some more details might clarify.
The processor is an 18LF4620 TQFP. It spends most of its time asleep where it draws 2.6 uA with a 4 MHz xtal. It runs at about 4 mA plus the external signal conditioners on a 4 MHz xtal. I am hoping to reduce the 'on' current to much below 1 mA with the slower clock.
I have to accurately measure the frequency/rate of some events so RC oscillators are out of the question during the measure phase.
I will have ICSP programming brought out to a 6 pin header. I can load different code for the logging phase and for the data dump phase. The ICSP has access to the configuration fuses so the XT/HS changeover should be possible. I figure to push a high level (~1 Vpp)20 MHz clock over the top of the 100 KHz xtal through this header. Real estate is ultra cramped so extra gates for a clean clock changeover are out.
BrianT
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