18F4550 XTAL Problem

[skimask]

Ok I think that I found the Problem,I have 20 Mhz Xtal but I must write Define OSC 48 while 20/5 = 4*24= 96 Mhz for PLL / Divider 2 = 48 Mhz CPU Clock.

Regards Pesti

Ahhh...that makes sense.
I thought you had a 20Mhz crystal and 20Mhz CPU clock.
But, if that's the case, then your dividers (SPBRG) are going to be off also. Off the top of my head, I think 153 or 154 will do for SPBRG at 48Mhz CPU clock.
I could be wrong...