Thank you for the great commentary.

I have recently completed a fairly complex project using many of the development techniques you mentioned like using hyperterm to send and receive ASCII as a way of verifying the program on the PIC and it's character parsing.

My design is a PC based model railroad controller programmed in a Visual C environment which serially sends ASCII characters out to the PIC which in turn controls 16 latching relays. The idea of fanning out to slave PIC's was an earlier design idea which I abandoned prompting the matter I introduced in this thread. The design generation after that was using a "MAX4821" which used 3 address lines a latch and a reset line to address each of 4 relays on a "module." This would allow me 4 modules for my 16 relays. A 16F628A would handle the output lines and I could still use the ASART for serial in. I could never get more than 2 of these 4 relay "modules" to give me consistant results.

The most recent and successful design was brute force. I just used a 16F747 which gave me 32 outputs and 1 serial input. I could drive each side of the relay coils individually via a nice inductive load driver IC to produce a high or low state.

I got reliable results with the final design but I have always wanted to get a PIC to work like a traffic routing device in service to a master controller.

I will begin doing more work and try to apply some of your suggestions.