Unwanted output signal jitter

[skimask]

[QUOTE=LinkMTech;48591]A couple of thoughts...

CLRW                    ' Clear all registers<<<-----CLRW works with PBP?

ADCON1 = %00000000      '<<<---What's the default 'JUSTIFY' on a 16F737?

DEFINE ADC_BITS     5                     <<<<---Why not use all 8 bits?
-------and the manual says only 8,10,12...  I don't see 5 as a legal value

Low_Adj var byte ' Input declared as byte size <<<-- You might want WORD here
Low_set var word ' Input declared as byte size    <<<<- it is? :)

Low_set = (abs(low_adj-128))*8      <<<<---these lines look a bit scary to me

That last one...
If you get a value above 32, when multiplied by 8 will overflow a byte variable. Low_set is a word, but low_adj isn't. I seem to have bad luck when mixing variable sizes like that. But that's just me...
I think the ADC_BITS might be your killer. Keep it at 8 bits, AND out the low 3 bits, and shift it down by 3 bits.

EDIT: Notice I changed OR to AND. My mistake..duhhhh...