ADCIN problems with PIC16F73

[paul borgmeier]

Could you please suggest values for the decoupling caps between VDD and VSS and the cap on RA3?

I'd use 100 pF or so (5 time periods * 100e-12 * 2000 = 1uS, way less than your 50uS sample time). This is not your problem either, my thought was you might have had something too big on there slowing the charge. Adding a cap here will help keep the answer solid, but at 8 bits, you should not have a problem without for now.

the rails?

[passion1]

I'd use 100 pF or so (5 time periods * 100e-12 * 2000 = 1uS, way less than your 50uS sample time).

Paul

I assume this is the value for the cap on RA3?
Should it be electrolytic or ceramic?
Thanks for all the help!