ADCIN problems with PIC16F73

[passion1]

Paul

Thank you for the suggestions.
Could you please suggest values for the decoupling caps between VDD and VSS and the cap on RA3?


I have also searched all the other threads and have come across some comment for related problems.
The suggestions include:
1. Try setting the settling time on the ADC to a few microseconds, then initiating a conversion.
At the same time, make the PIC SLEEP for around the same length of time as the conversion.
This should SIGNIFICANTLY reduce the noise across the PIC silicon substrate and give you a lot better accuracy.

2. As a start, increase your Sample Time and/or change your Clock Source.
It's a good possibility that you are not letting the sampling Capacitor enough time to charge properly before you take your reading.


3. Have a cap on ADC pin. Try from 10uF to 220uF. (Cap+ to ADC pin, Cap- to GND.)
and, change Pause 20 to Pause 500.

4. Input pin require a pullup resistor too.

5. For 20 MHz OSC; Fosc/32 could be the solution as it helped me solve a similar problem

Any comments which of the above suggestions would be applicable to my problem?
Is the settling time and sample time the same thing?
How do I make the PIC sleep?
Should I try a cap or a pullup resistor or both, and if so where must the cap and resistor be placed and
what values would be recommended?
Thank you in advance!

[passion1]

Paul

The resistance of the transducer I am using is:
RL Load resistance >= 2KOhm
RM Internal measuring resistance 208 Ohm

Could you please suggest values for the decoupling caps between VDD and VSS and the cap on RA3?

[paul borgmeier]

Could you please suggest values for the decoupling caps between VDD and VSS and the cap on RA3?

I'd use 100 pF or so (5 time periods * 100e-12 * 2000 = 1uS, way less than your 50uS sample time). This is not your problem either, my thought was you might have had something too big on there slowing the charge. Adding a cap here will help keep the answer solid, but at 8 bits, you should not have a problem without for now.

the rails?

[passion1]

I'd use 100 pF or so (5 time periods * 100e-12 * 2000 = 1uS, way less than your 50uS sample time).

Paul

I assume this is the value for the cap on RA3?
Should it be electrolytic or ceramic?
Thanks for all the help!