ADCIN problems with PIC16F73


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  1. #1
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    (2.54/5*255=129.54)?
    Should be 256 instead of 255. 0 to 255 = 256

    What are you using for a reference voltage?
    The results you are getting looks like the reference is swinging from 5.91 to 6.84 volts.
    256 x SIGNAL / ADCresult = REF VOLTAGE

    Do you have another volt meter?
    Dave
    Always wear safety glasses while programming.

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    Quote Originally Posted by mackrackit View Post
    Should be 256 instead of 255. 0 to 255 = 256
    I believe it to be correct as originally written - the largest output from the ADC is 255, which should match AVDD....

    IF the input is the upper rail ...

    255/255 * AVDD = AVDD
    255/256 * AVDD <> AVDD

    my 2 cents
    Paul Borgmeier
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    Hi Paul,

    I missed the RA3 as the ADC input on this one, but I will stick to the idea that to get to 255 there are 256 steps.

    What if there is a 5v ref and a 2.5v sig.

    2.5/5*256=128

    I thought this digital stuff started at 0?
    Dave
    Always wear safety glasses while programming.

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    Paul

    Thank you for the suggestions.
    Could you please suggest values for the decoupling caps between VDD and VSS and the cap on RA3?


    I have also searched all the other threads and have come across some comment for related problems.
    The suggestions include:
    1. Try setting the settling time on the ADC to a few microseconds, then initiating a conversion.
    At the same time, make the PIC SLEEP for around the same length of time as the conversion.
    This should SIGNIFICANTLY reduce the noise across the PIC silicon substrate and give you a lot better accuracy.

    2. As a start, increase your Sample Time and/or change your Clock Source.
    It's a good possibility that you are not letting the sampling Capacitor enough time to charge properly before you take your reading.


    3. Have a cap on ADC pin. Try from 10uF to 220uF. (Cap+ to ADC pin, Cap- to GND.)
    and, change Pause 20 to Pause 500.

    4. Input pin require a pullup resistor too.

    5. For 20 MHz OSC; Fosc/32 could be the solution as it helped me solve a similar problem

    Any comments which of the above suggestions would be applicable to my problem?
    Is the settling time and sample time the same thing?
    How do I make the PIC sleep?
    Should I try a cap or a pullup resistor or both, and if so where must the cap and resistor be placed and
    what values would be recommended?
    Thank you in advance!

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    Paul

    The resistance of the transducer I am using is:
    RL Load resistance >= 2KOhm
    RM Internal measuring resistance 208 Ohm

    Could you please suggest values for the decoupling caps between VDD and VSS and the cap on RA3?
    Last edited by passion1; - 25th July 2007 at 14:37.

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    Quote Originally Posted by passion1 View Post
    Could you please suggest values for the decoupling caps between VDD and VSS and the cap on RA3?
    I'd use 100 pF or so (5 time periods * 100e-12 * 2000 = 1uS, way less than your 50uS sample time). This is not your problem either, my thought was you might have had something too big on there slowing the charge. Adding a cap here will help keep the answer solid, but at 8 bits, you should not have a problem without for now.

    the rails?
    Paul Borgmeier
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    Quote Originally Posted by paul borgmeier View Post
    I'd use 100 pF or so (5 time periods * 100e-12 * 2000 = 1uS, way less than your 50uS sample time).
    Paul

    I assume this is the value for the cap on RA3?
    Should it be electrolytic or ceramic?
    Thanks for all the help!

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    >> missed the RA3 as the ADC input on this one
    I am not sure how this relates to my post??

    >> but I will stick to the idea that to get to 255 there are 256 steps.
    I agree, 0-255

    >>What if there is a 5v ref and a 2.5v sig. 2.5/5*256=128
    no
    256 takes 9 bits to represent 100000000
    255 takes 8 bits to represent 11111111
    127 takes 7 bits to represent 1111111

    255 divided by 2 = 127
    2.5/5*255=127

    clear as mud?

    >> I thought this digital stuff started at 0?
    it does, 0-255
    Paul Borgmeier
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    Passion1,

    Try converting the rails first - what do you get?

    What is the output impedance of your transducer? Can't suggest a cap for RA3 until this is known.

    For VDD and VSS, try a 10uF electrolytic and a .1uF ceramic (in parallel) - but adding these blindly is not your solution - what are you using for a power supply? I cannot believe this (lack of these caps) is your problem if you get 95 or 110 out now.

    What else is going on in the circuit?
    Paul Borgmeier
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    Quote Originally Posted by mackrackit View Post
    Should be 256 instead of 255. 0 to 255 = 256
    So, are there 13 inches in a foot, 37 inches in a yard, etc.?

    0-255 represents 256 values (if you consider 0 is a value) but there are only 255 intervals. It's easier to see this by using smaller scales - e.g. 0-4.

    With GND--1K--1K--1K--1K--5V, each resistor drops 1/4 of 5V.

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