From c to pbp

[Bruce]

If you're going to convert this to produce the same timing at 4MHz, you'll
need to use an assembler delay routine.

At 20MHz, like the original C version, delay_cycles(59); gives you a delay of
59 * 200nS instruction cycles. 59 * 200nS = 11.8uS.

PAUSEUS at 4MHz is limited to a minimum delay period of 24uS, and with an
instruction time of 1uS at 4MHz, you're still going to be off by a minimum of
200nS.

12uS is about as close as you can get to the original 11.8uS delay period.

'  For 4MHz use XT_OSC
   @ DEVICE PIC16F84A, XT_OSC,WDT_OFF,PROTECT_OFF,PWRT_ON

   DEFINE OSC 4
   ltime VAR BYTE

   GOTO Main
   
PAUSE12:  ' CALL to here = 2uS  
ASM
    GOTO $+1 ; 2uS
    GOTO $+1 ; 2uS
    GOTO $+1 ; 2uS
    GOTO $+1 ; 2uS
    RETURN   ; 2uS (12uS total delay time)
ENDASM

Main:
   TRISB = 0
   FOR ltime = 0 TO 49 ' 50 loops total
    PORTB.7 = 1
    PAUSE 50
    PORTB.7 = 0
    PAUSE 50
   NEXT ltime

   WHILE (1)
    PORTB = 1
    CALL PAUSE12
    PORTB = 2
    CALL PAUSE12
    PORTB = $41
    CALL PAUSE12
    PORTB = $42
    CALL PAUSE12
   WEND

   END

This would give you very close to the same program & timing. The difference
is the delay between port updates in the WHILE loop are 12uS VS 11.8uS.

[savnik]

Thank you.
I want to test this code with Attached Image.
At port.0 and port.1 must have 38khz and at port.6 must have 19khz

[keithdoxey]

Thank you.
I want to test this code with Attached Image.
At port.0 and port.1 must have 38khz and at port.6 must have 19khz

You may get the code to work but I dont see how that schematic is going to work if you are trying to build a stereo encoder for an FM transmitter.

Both audio inputs are labelled as {RIGHT} sorry...R IN L IN {end of edit} instead of right and left and the circuit appears to just chop both inputs up at a rate of 38kHz. Presumably the PIC is outputing the two 38kHz signals out of phase otherwise you may as well use the same signal !!!

FM broadcasts were designed to be Mono compatable so have a mono audio signal (L+R) with a difference signal (L-R) carried on a 38kHz subcarrier.

The 19kHz carrier is to operate the pilot indicator in the receiver and switch on the demux to regenerate the original Left and Right signals from Mono + Side.

http://www.irational.org/sic/radio/tech.html#Stereo

gives a block schematic of a stereo encoder which is totally different from what your schematic seems to do.

[Bruce]

For 38kHz on RB0 & RB1, and 19kHz on RB6, you'll need to modify the delay
routines. This should work for ~38kHz & 19kHz. It's off by a few 100Hz, but
a lot closer than the other version.

 ' For 4MHz use XT_OSC
 @ DEVICE PIC16F84A, XT_OSC,WDT_OFF,PROTECT_OFF,PWRT_ON

 ' For 4MHz use 
 DEFINE OSC 4
 ltime VAR BYTE
 TRISB = 0
 
 GOTO Main
 
PAUSE9:    
ASM
    GOTO $+1 ; 2uS
    GOTO $+1 ; 2uS
    GOTO $+1 ; 2uS
    NOP      ; 1uS
    RETURN   ; 2uS 
ENDASM

PAUSE7:    
ASM
    GOTO $+1 ; 2uS
    GOTO $+1 ; 2uS
    NOP      ; 1uS
    RETURN   ; 2uS 
ENDASM

Main:
   FOR ltime = 0 TO 49 ' 0 TO 49 = 50 loops total
    PORTB.7 = 1
    PAUSE 50
    PORTB.7 = 0
    PAUSE 50
   NEXT ltime

   WHILE 1=1
    PORTB = 1
    CALL PAUSE9 ' CALL = 2uS
    PORTB = 2
    CALL PAUSE9
    PORTB = $41
    CALL PAUSE9
    PORTB = $42
    CALL PAUSE7 ' Compensates for GOTO beginning of WHILE loop
   WEND
   
   END

[savnik]

I have made the pcb and these days i will try if work.

[savnik]

I have made the pcb and these days i will try if work.

Thank you Bruce
I test and work , but it should not all the delays they is same; PAUSE9

Edit: I use the code as you post , without any change.

[Jerson]

The delays shown by Bruce are mistakenly wrong. The original code shows delay_cycles(59) That is delay for 59 cycles. So, by using Bruce's code as a start, you can make the delay for 59 cycles. This will give you the correct timings. Another thing, the oscillator is 20MHz. So, the initial define has to be

define OSC  20000000

cntr    byte    1

delay_cycles59:             ' 2 cycles to get here

asm
         MOVLW  11          ' 1 cycle
         MOVWF  _cntr      ' 1 cycle
loop:  DECFSZ _cntr,F     ' 1 cycles  (3*17+1 = 52)
         GOTO   loop          ' 2 cycles
         nop                    ' 1 cycle
         return                 ' 2 cycles

endasm

The above has a subroutine to give you an exact delay of 59 cycles. You can call the function from PBP like this

         gosub  delay_cycles59