AD Negative Voltage reference

[flotulopex]

Hello,

I need to measure a 5V range but because of the voltage-regulator's "adjust" pin, the relative 0V (zéro) is already 1,2V!

Currently, the range is from 1,2V to 6,2V if measured against Vss (GND).

I already set ADCON0.6=1 (+Vref) and use a 6,2V Zener.

Now, AD reads from Vss to +6,2V.

But when I need to read "0V" (zéro), AD will still give me something like 70 (8bit res) because I can't get lower than 1,2V.

How can I pull the GND up from 0 to 1,2V or what is the way to do it right?

[Darrel Taylor]

Hi Roger,

Are you really putting 6.2V on a PIC pin?

Sounds dangerous to me. But maybe I'm missing something.
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[Pic_User]

Hi Roger,

Pin input should generally not exceed Vcc on most ICs including the PIC. Your A/D input should be lowered by some means to 5V maximum (assuming you are supplying 5V to the PIC). Probably the simplest way to do this is with a voltage divider.
See Darrel’s helpful post:
http://www.picbasic.co.uk/forum/show...=2010#post2010

There are ways to negate the regulator’s 1.2V. All ways would add to your circuit complexity. Depends if you want to just subtract it from the PIC A/D reading, or really make the output from the regulator go all the way down to zero volts. You may want to bump the resolution up from 8 bits to 10 bits and just work around the missing 1.2V chunk with programming.
Anyway, don’t put more that the supply voltage into the pins (or negative voltage either ).

-Adam-

[flotulopex]

Voilà, this is how my circuit looks like:
<img src="http://www.picbasic.co.uk/forum/attachment.php?attachmentid=1820&stc=1&d=118301268 7">
Voltages I measure are:
1.- GPIO.5 = HPWM = 1,2V to 6,2V;
2.- GPIO.1 = AD = 1,2V to 5,1V.

To make it work (voltage control), I must connect R5. In the same time, voltage on GPIO.5 raises up from 0V to 1,2V.

Do I have to "protect" GPIO.5 pin against this 1,2V even if it is an Output?

If yes, how?

NB: is Vref limited to max 5V?

[Pic_User]

Hi Roger,

PIC devices have a good deal of protection built into their design.
There is the equivalent of Zener diodes on each I/O pin.
These “voltage clamps” help to protect the device from us.
The protection can handle a bit of “over voltage” caused, current (clamp current), but there is a limit.

The PIC12F675 has a limit of 20 mA output clamping current.
(Output clamp current, IOK (Vo < 0 or Vo >VDD) 20 mA).
Your schematic diagram shows R1 protecting the 12F675 HPWM Output pin (GPIO.5).
The protection depends upon the (over) voltage and the resistance value of R1.

-Adam-

Absolute Maximum Ratings PIC12F675
Voltage on VDD with respect to Vss -0.3 to +6.5V
Voltage on MCLR with respect to Vss -0.3 to +13.5V
Voltage on all other pins with respect to Vss -0.3V to (VDD + 0.3V)
Input clamp current, IIK (VI < 0 or VI > VDD) ± 20 mA
Output clamp current, IOK (Vo < 0 or Vo >VDD) 20 mA
Maximum output current sunk by any I/O pin 25 mA
Maximum output current sourced by any I/O pin 25 mA
NOTICE: Stresses above those listed under ‘Absolute Maximum Ratings’ may cause permanent damage to the device.
http://ww1.microchip.com/downloads/e...doc/41190c.pdf