3 phase sequencing

[Ioannis]

I think RA does not have Interrupts.

Anyway the idea is correct. Another add-on would be to have a learn stage, so the connections of the R-S-T can be memorized first, and then turn into running mode for continuous checking of the sequence.

Ioannis

[ardhuru]

Hi Skimask, Dave,

Thanks. Do I understand that both of you are essentially suggesting a similar thing?

Dave, as you pointed out I have directly input the phases thru' resistors. This effectively gives me only 3 half cycles per 3-phase cycle. For what you suggest would I need to have full-wave rectified signals (6 half cycles) at the inputs?

Sorry I'm being dense about this but its a first as far as 3 phase design is concerned.

Regards,

Anand

[T.Jackson]

Sorry I'm being dense about this but its a first as far as 3 phase design is concerned.

I hope someone's a licensed electrician here - I'm all for the competent hobbyist playing around with single phase (110 -240), but 3 phase 415V being feed to a digital circuit, when I hear someone say "this a first for me", makes me wonder if it's really such a good idea.

[ardhuru]

Point taken!

I do have lots of experience with transformerless designs, interfacing mains directly with the PIC (as in X10 receivers and transmitters etc.), traic controllers and so on but like I said its the first with 3 phase. So, its more an issue pertaining to the timings involved, rather than electrical aspects.

Regards,

Anand

[Pic_User]

Hi Anand,

[PDF] Loss of AC Voltage Considerations -
http://www.pes-psrc.org/Reports/Loss...Protection.pdf

Pasted:
1.0 Introduction
Protection of power system elements such as transmission lines, generators, etc., often requires accurate measurement of three-phase voltage to provide reliable fault detection and breaker operations to minimize power system disruptions.
-Adam-

[dhouston]

Dave, as you pointed out I have directly input the phases thru' resistors. This effectively gives me only 3 half cycles per 3-phase cycle. For what you suggest would I need to have full-wave rectified signals (6 half cycles) at the inputs?

Anand, assuming you use pins capable of Interrupt on Change, you'll get an interrupt on both the rising and falling edge. It's the same as using it for ZC detection in AN236 which also discusses the slight assymetry because of different trigger voltages for rising vs. falling edges.

Look at the second oscilloscope screenshot on this page. It's a ZC detector on pin 13 of the PIC.

• http://davehouston.net/ESM1-TEST.htm

The protection diodes on the pin effectively give you a square wave. In your case, the higher voltage will give steeper edges. You'll get 100 interrupts per second per phase or 300 total per second.

Interrupt on Change cannot be preset for falling or rising edges. It interrupts on both and sets register bits to indicate the pin and rising or falling. On each interrupt you reset the timer, check the register bits to determine pin & polarity, clear the interrupt and output your coded representation of the event.

P.S. What I'm suggesting is much, much simpler than what Skimask suggested.

[ardhuru]

Anand, you'll get an interrupt on both the rising and falling edge.

In your case, the higher voltage will give steeper edges. You'll get 100 interrupts per second per phase or 300 total per second.

Interrupt on Change cannot be preset for falling or rising edges. It interrupts on both and sets register bits to indicate the pin and rising or falling. On each interrupt you reset the timer, check the register bits to determine pin & polarity, clear the interrupt and output your coded representation of the event.

Great, Dave! Thats exactly what I needed to be on the right track.

Thanks again.

Regards,

Anand

[Charles Linquis]

I have done exactly what you describe.

I used 3 opto-isolators. Each opto had a diode in series and another diode across the LEDs so that they can't possibly get reverse-biased.

I used a 15K 1W resistor in series for current limiting. It "looks" only at the positive half-cycles. The output of the phototransistor is close to a square wave, and is - of course, totally isolated. It works fine at both 110V and 230V.

I can give you more details if you are interested in pursuing this approach.

[ardhuru]

Charles, I am *extremely* interested in knowing more about your technique.

The hardware side is somewhat different from yours, but I too end up with a 'somewhat' square wave (half cycles only) at the pic input. And since I am not interested in the absolute values, I guess that difference can stay.

I would however love to know more about the software approach you used.

Thanks and regards,

Anand

[Charles Linquis]

This code wasn't interrupt-driven, because it didn't need to be
By changing "PhaseDelay" you can make it work for either 60 or
400 hz, or by using PULSIN, you can make it auto-sensing.




CheckACPhase:
HighTimer = 0
CheckPhaseA:
IF PhaseA = 0 THEN ' Voltage is present or else wouln't be low
WHILE PHASEA = 0:WEND
HighTimer = 0
GOTO CheckPhaseB
ENDIF
Pauseus PhaseDelay
HighTimer = HighTimer + 1
IF HighTimer => 10 THEN GOTO PhaseAError
GOTO CheckPhaseA
PhaseAError: ; No phase A - was never low in 930 uSec period
StatINfo.0 = 0 ; Can't check for proper phasing, so give error
HighTimer = 0
CheckPhaseB:
If PhaseB = 0 THEN
StatInfo.3 = 0 'Erase the error
HighTimer = 0
Goto CheckPhaseC
ENDIF
WaitForLowB:
Pauseus PhaseDelay
IF PhaseB = 0 THEN goto PhaseBError2
HighTimer = HighTimer + 1
IF HighTimer => 10 THEN GOTO PhaseBError1
GOTO WaitForLowB
PhaseBError1: ; No signal
StatINfo.1 = 0 ; Can't check for proper phasing, so give error
HighTimer = 0
GOTO CheckPhaseC
PhaseBError2: ; Signal, but wrong phase

HighTimer = 0
CheckPhaseC:
If PhaseC = 0 THEN
Goto DunPhaseCheck
ENDIF
Pauseus PhaseDelay
HighTimer = HighTimer + 1
IF HighTimer => 10 THEN GOTO PhaseCError
GOTO CheckPhaseC
PhaseCError:
StatInfo.2 = 0

DunPhaseCheck:
IF Statinfo.0 = 0 or StatInfo.1 = 0 OR Statinfo.2 = 0 Then
StatInfo.3 = 1
ENDIF
RETURN



; When returned, Statinfo bit 3 = 0 = OUT OF PHASE
; bit 0 = 0 = PhaseA not present
; bit 1 = 0 = PhaseB not present
; bit 2 = 0 = PhaseC not present
; When any phase is not present, bit 3 is always SET.