all unused i/o have to be tied somewhere (Vdd, Vss), via resistor or not.
all unused i/o have to be tied somewhere (Vdd, Vss), via resistor or not.
Steve
It's not a bug, it's a random feature.
There's no problem, only learning opportunities.
For an active input, I use a 10K resistor in series. If the input can tolerate it, I also use a .01uF cap from input to gnd. Not much you can do for an output except diodes to VSS and VDD.
I think problems with ESD Electro Static Discharge tend to be overly exaggerated. I've done all sort of projects with CMOS IC's and never had one go on me. As Mister_e pointed out - tie all unused inputs to ground and this should be enough. PIC's have built in diode clamps too, you stand a better chance at winning the lottery than damaging your PIC through ESD.
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