And I just downloaded the latest/greatest 12F683 datasheet and it DOESN'T have that statement in there. What's up with that?
Couldn't you update the duty cycle right after T2 has overflowed? As long as the duty cycle wasn't too low or too high, wouldn't this almost eliminate all false glitches?µChip clearly says : Changing the dutycycle while PWM running (and only dutycycle is enough ) will produce unwanted effects ...
The only way I see to keep ( is it really necessary ??? Good Q.) a "neat" PWM output would be to switch between HPWM, to the last produced fixed freq. and duty, soft PWM ... while disabling CCP, changing Dutycycle and re-enabling the CCP.
I got a good handle on "what's wrong" 'cause I ran into the same problem with my multi-channel software PWM program I wrote to run a bunch of lights awhile back. And my fix for the problem was to only update the PWM duty cycle for each channel in between cycles, so basically, I ended up with PWM that couldn't do 100% duty cycle, but only about 0%-95% duty cycle. The extra 5% at the top end was used to update the software registers.Back to our Friend Skimask ... I really do not know ... if he really doesn't know the "what is wrong".
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