TTL - Transistor-Transistor-Logic, valid logic low between (0 - 0.8v), while valid logic high must be within the region of (2 - 5v) Any where between (0.8 - 2v) may be read as either logic high or low. You can't predict it. Could even oscillate.

CMOS - Complementary-Metal-Oxide-Semiconductor on the other hand can be feed with up to 26% of VCC for a logic low and a minimum of 73% of VCC for a logic high.

This industry standard ensures that CMOS is guaranteed to produce no more than 26% of VCC for a low output and no less than 73% of VCC for a high out.

CMOS is far, far superior to TTL in that it mirror's current from in to out. Some CMOS chips can even partially function even without supply. i.e. if there's something on an input you still get something on an output. TTL is however much more robust. That's the trade off. Plus TTL has a much bigger fanout,
which means that more inputs can be driven from an output.

Trent Jackson