From the datasheet:


DEVICE/PAGE ADDRESSES (A2, A1, A0): The A2, A1 and A0 pins are device address
inputs that are hard wired or left not connected for hardware compatibility with
AT24C16. When the pins are hardwired, as many as eight 32K/64K devices may be
addressed on a single bus system (device addressing is discussed in detail under the
Device Addressing section). When the pins are not hardwired, the default A2, A1, and A0
are zero.
WRITE PROTECT (WP): The write protect input, when tied to GND, allows normal write
operations. When WP is tied high to VCC, all write operations to the upper quandrant
(8/16K bits) of memory are inhibited. If left unconnected, WP is internally pulled down to
GND.

The A2, A1, and A0 pins use an internal proprietary circuit that biases them
to a logic low condition if the pins are allowed to float.