MCLR is tied up to vdd through a 4.7K res
VLP has been disabled during programming.
Vdd and Vss are both connected and there is a 0,1uF cond between.
WDT is off
BOR is off
|
MCLR is tied up to vdd through a 4.7K res
VLP has been disabled during programming.
Vdd and Vss are both connected and there is a 0,1uF cond between.
WDT is off
BOR is off
|
can you post the offending code here... i miss something...
Steve
It's not a bug, it's a random feature.
There's no problem, only learning opportunities.
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