i would guess...
Code:
asm
__CONFIG _CONFIG1L, _PLLDIV_12_1L & _CPUDIV_OSC1_PLL2_1L & _USBDIV_2_1L
; ; ; USB clock source comes from the 96 MHz PLL divided by 2
; ; [OSC1/OSC2 Src: /1][96 MHz PLL Src: /2]
; Divide by 12 (48 MHz oscillator input)
__CONFIG _CONFIG1H, _FOSC_ECPLLIO_EC_1H & _FCMEN_OFF_1H & _IESO_OFF_1H
; ; ; Oscillator Switchover mode disabled
; ; Fail-Safe Clock Monitor disabled
; External clock, PLL enabled, port function on RA6, EC used by USB
;
; other __Config
;
endasm
Look table 2-3 in the data sheet. there's few other setting available. Not sure the divide by 12 is the best option when you can feed it directly.
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