Nope, that DEFINE just tells PBP what sort of timing to use when it compiles. For example, if you defined 4mhz, a pause 1000 would have x number of delay statements (or loops or whatever). If you define 20mhz, PBP will automatically change that X number to 5 times the number of delay statements (or loops or whatever). The real explanation is towards the end of the PBP manual.
For checking your xtal config bits, you'll either want to check you programmer's config bit settings (which you'd probably do right before you hit the program button), or start adding config lines in your code.
For example, here's a bit (ok, actually it's all of them plus explanations below it of what each register does and how to use it) of config's for one of my projects using a PIC18F4620:
@ __CONFIG _CONFIG1H, _OSC_HSPLL_1H & _FCMEN_OFF_1H & _IESO_OFF_1H
@ __CONFIG _CONFIG2L, _BOREN_OFF_2L & _PWRT_ON_2L
@ __CONFIG _CONFIG2H, _WDT_OFF_2H & _WDTPS_32768_2H
@ __CONFIG _CONFIG3H, _LPT1OSC_OFF_3H & _MCLRE_ON_3H & _PBADEN_OFF_3H & _CCP2MX_PORTC_3H
@ __CONFIG _CONFIG4L, _XINST_OFF_4L & _STVREN_OFF_4L & _LVP_OFF_4L & _DEBUG_OFF_4L
@ __CONFIG _CONFIG5L, _CP0_OFF_5L & _CP1_OFF_5L & _CP2_OFF_5L & _CP3_OFF_5L
@ __CONFIG _CONFIG5H, _CPB_OFF_5H & _CPD_OFF_5H
@ __CONFIG _CONFIG6L, _WRT0_OFF_6L & _WRT1_OFF_6L & _WRT2_OFF_6L & _WRT3_OFF_6L
@ __CONFIG _CONFIG6H, _WRTC_OFF_6H & _WRTB_OFF_6H & _WRTD_OFF_6H
@ __CONFIG _CONFIG7L, _EBTR0_OFF_7L & _EBTR1_OFF_7L & _EBTR2_OFF_7L & _EBTR3_OFF_7L
@ __CONFIG _CONFIG7H, _EBTRB_OFF_7H
;----- CONFIG1H Options --------------------------------------------------
;_OSC_LP_1H,_OSC_XT_1H,_OSC_HS_1H,_OSC_RC_1H,_OSC_ EC_1H,_OSC_ECIO6_1H,_OSC_HSPLL_1H,_OSC_RCIO6_1H,_O SC_INTIO67_1H,_OSC_INTIO7_1H,_FCMEN_OFF_1H,_FCMEN_ ON_1H,_IESO_OFF_1H,_IESO_ON_1H
;----- CONFIG2L Options --------------------------------------------------
;_PWRT_ON_2L, _PWRT_OFF_2L, _BOREN_OFF_2L, _BOREN_ON_2L, _BOREN_NOSLP_2L, _BOREN_SBORDIS_2L, _BORV_0_2L, _BORV_1_2L, _BORV_2_2L, _BORV_3_2L
;----- CONFIG2H Options --------------------------------------------------
;_WDT_OFF_2H, _WDT_ON_2H, _WDTPS_ 1 / 2 / 4 / 8 / 16 / 32 / 64 / 128 / 256 / 512 / 1024 / 2048 / 4096 / 8192 / 16384 / 32768 _2H
;----- CONFIG3H Options --------------------------------------------------
;_MCLRE_OFF_3H, _MCLRE_ON_3H, _LPT1OSC_OFF_3H, _LPT1OSC_ON_3H, _PBADEN_OFF_3H, _PBADEN_ON_3H, _CCP2MX_PORTBE_3H, _CCP2MX_PORTC_3H
;----- CONFIG4L Options --------------------------------------------------
;_STVREN_OFF_4L, _STVREN_ON_4L, _LVP_OFF_4L, _LVP_ON_4L, _XINST_OFF_4L, _XINST_ON_4L, _DEBUG_ON_4L, _DEBUG_OFF_4L
;------CONFIG5/6/7 Options not used for code/eeprom protection





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