ADRESHI has the most signifigant bits, leaving ADRESLO with the least signifigant bits.

The data from the A2D is 10 bits wide... so the question is where to put 10 bits into 2 seperate 8 bit result registers.

If you left justify, you space everthing so the highest (most sig) data bit align with the highest (most sig) register bit.

Right justify puts the lowest data bit in line with the register's lowest bit. That means the hi register only has the top 2 sig bits.

When you left justify, as the hi register has the most sig 8 bits it also has the 8-bit (non rounded) result.

Hope this is more helpful then confusing.