Hi,
I'm no ASM expert but here's some thoughts:
First on the timings you get.
Each PIC instruction takes 1-2 cycles, GOTO takes 2. When the interrupt occurs the program first jumps to the interruptvector (0004h) which in turn points to the adress of your interrupt handler and the software then jumps there. So that's 2 GOTO's for a total of 4 cycles or 800nS @ 20MHz. Then comes your out=1 statement which takes another 200nS for a total of 1uS the remaining 200nS delay may be the difference between RB0 going high and the interrupt request being latched in the PIC by the clock.
So a think that 1-1.2uS is probably the best you can do with this aproach.
Second,
I agree, logic chips aren't as fun as PIC's but if you can live with just one logic chip you could use a RS-latch and set it with the rising edge of your zero crossing pulse and at the same time start a timer in the PIC which will reset the latch after 200uS.
If that works perhaps you could perhaps tie a second PIC-pin to the latch output (isolated from each other with diodes) and use the timer or your PauseUs sequence to pulse it. I beleive that would get your latency down a bit further.
On the context saving I think it's probably like you say. Your main program does nothing that uses any of the registers that usually needs to be saved so that's why it works. Just don't try to do any 'real' work in the main program....
HTH
/Henrik Olsson.
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