It's a really interesting PLL on these chips.

The PLL's VCO always runs at 96mhz. And the crystals frequency is always divided down to 4mhz for the PLL reference. So in effect, the frequency of the crystal doesn't matter, only it's tolerance.

The only stability issue is the Jitter of +/- 0.25% But with either a 4mhz or 20mhz crystal, it's the same because it's inherent to the PLL.

The only way to remove the Jitter from the equation is to go back to the external clock (EC) and provide the 48mhz without using the PLL.

But, it won't really matter any which way you go. They'll all work just fine.

DT