Under communications, an I2C section.

[SteveB]

The 24LC16B memory chip doesn't appear to allow you to use multiple chips.

Looking at the datasheet, you are correct. The "address pins" are not used on this chip. But, if you are still in the design stage, the 24LC32B chips do allow for up to 8 seperate chips on the bus. Just a possibilty. (EDIT: This is, 8 seperate 32B Chips. Even with the 16B chips, you could have a RTC, ADC, whatever, as long as the first 4 bits (MSB) of the address for the other chips are different)

I have two different chips sharing memory, say a PIC and an Ethernet chip.

Well, in this case, the PBP software I2C is not a good choice for multimaster situation. If the PIC has hardware I2C that supports multimaster, that might be used. Unless one master was dominating access to the bus and kept it very busy with long data exchanges, you still could probably do with just one one bus, as the wait for the bus to be free should not take long.

A part # on the bus enhancement chip(s) would be useful for my research.

Take a look here. This should give you a idea of what is available. I have used a bus-extender (P82B715) for long distances with good success.

Finally, as mister_e already stated, you can have as many PBP I2C buses as you have pairs of IO pins. If you aren't short of IO pins, why not. Also, if your PIC has a harware I2C, you can use that as well (much faster than PBP "bit-banged" bus BTW).

Steve