Possibly not.

The 24LC16B memory chip doesn't appear to allow you to use multiple chips. I would be using this chip, or some other memory chip, as message queues to external systems. If I can't have more than one memory chip on this bus, then multiple busses is an option.

Here's a scenario that it might make sense: I have two different chips sharing memory, say a PIC and an Ethernet chip. While the Ethernet chip is writing to memory, the bus is busy, so the PIC can't access it, or anything else on that bus. If there were a second bus, say a RTC and one or more sensors, the PIC could access that bus and get info at the same time the Ethernet chip is writing to the memory.

This project is in its early design phases, and I'm trying to keep my options open while I explore the pros and cons.

A part # on the bus enhancement chip(s) would be useful for my research.

Thanks for your input!

bcf