mS Timer

[Bruce]

And then there's the old fashioned way..;o}

' PIC18F242 @20MHz
DEFINE OSC 20
DEFINE INTHAND Capture   ' Context saving for High Priority Ints
DEFINE DEBUG_REG PORTC
DEFINE DEBUG_BIT 6 
DEFINE DEBUG_BAUD 115200
DEFINE DEBUG_MODE 0      ' 1 = inverted, 0 = true

OverFlows  VAR BYTE BANKA SYSTEM ' Timer1 overflow total
Remainder  VAR WORD BANKA SYSTEM ' Remaining Timer1 ticks after falling edge capture
Ready      VAR BYTE BANKA SYSTEM ' Indicates pulse width measurement is complete when 1
Ready = 0

ReStart:
    CCP1CON = %00000101  ' Capture mode, capture on rising edge
    T1CON = 0            ' TMR1 prescale=1, clock=Fosc/4, TMR1=off (200nS per count @20MHz)
    RCON.7 = 1           ' Enable priority interrupts
    PIE1.0 = 0           ' Disable Timer1 over flow interrupt
    PIE1.2 = 1           ' Enable CCP1 interrupt
    PIR1 = 0             ' Clear any pending interrupt flags
    PIR2 = 0             ' before enabling global
    INTCON.7 = 1         ' Enable all unmasked interrupts

Main:    
    WHILE !Ready         ' While not ready, wait
    ' Do other stuff here if needed
    WEND
    
    ' Result is ready
    DEBUG "Timer Overflows = ",DEC OverFlows
    DEBUG "Remaining ticks = ",DEC Remainder,13,10
    Ready = 0
    
    PAUSE 2000
    GOTO ReStart

'---[CCP1 & Timer1 - interrupt handler]------------------------------------------
ASM
Capture
    btfsc PIR1,TMR1IF         ; Timer1 interrupt?
    bra   T1_Int              ; Yes. Goto T1_Int
    bcf   PIR1,CCP1IF         ; No it's a capture int so clear capture int flag
    btfss CCP1CON,0           ; Rising edge capture?
    bra   FallingEdge         ; No. Skip to falling edge capture
    clrf  TMR1H               ; Yes. Clear high count
    clrf  TMR1L               ; Clear low count
    bsf   T1CON,0             ; Turn Timer1 on at rising edge capture
    clrf  OverFlows           ; Clear over flow count
    clrf  Remainder           ; Clear remainder count
    bcf   PIE1,CCP1IE         ; Disable capture interrupt before switching
    bcf   CCP1CON,0           ; Switch to falling edge capture
    bcf   PIR1,0              ; Clear Timer1 overflow flag before enable
    bsf   PIE1,TMR1IE         ; Enable Timer1 Interrupt
    bsf   PIE1,CCP1IE         ; Re-enable capture interrupt
    bra   OVER_CCP            ; Done, exit
    
T1_Int
    bcf   PIR1,TMR1IF         ; Clear Timer1 overflow flag
    incf  OverFlows,f         ; Increment over flow count
    bra   OVER_CCP            ; Done, exit
       
FallingEdge
    bcf   T1CON,0             ; Stop Timer1
    bcf   PIE1,CCP1IE         ; Disable CCP1 interrupt
    bcf   PIE1,TMR1IE         ; Disable Timer1 interrupt
    bsf   CCP1CON,0           ; Switch back to rising edge capture
    movff TMR1L, Remainder    ; Get low byte on falling edge
    movff TMR1H, Remainder+1  ; Get high byte
    bsf   Ready,0             ; Indicate process is complete
 
OVER_CCP
    retfie fast               ; Done, return
ENDASM

     END