Thanks for your replies everyone, but I've gone ahead and just done it my way. All I really wanted was to disable interrupts during the 5 critical instructions that occur when setting up an EEPROM write, and then I wanted to re-enable them immediately after setting the WR bit, so that interrupts would be active during the 4mS EEPROM write-time. This is okay, and it is described clearly in the PIC datasheet. But, since I never did get access to the guts of the PBP "WRITE" routine, I just wrote my own routine. I called it "WRITE2", and it does what I need. I tested it on my bench for many thousands of EEPROM writes, and it never fails. This is much preferred over the re-try scheme, because the re-try scheme would introduce a lot of non-deterministic timings into my program, which I cannot afford. I am using this for motor control, so timing is critical. Thanks for the effort though.

Cheers.
GREG