Hi modifyit,
If you check the app note section:

"FIGURE 1: FIRMWARE FLOW DIAGRAM"
there is a flowchart describing how the code works... RESET > TestWDT > Etc

This is from the 12F675 data sheet about resets, and what registers are changed on various resets:

Some registers are not affected in any RESET
condition; their status is unknown on POR and
unchanged in any other RESET. Most other registers
are reset to a RESET state on:
Power-on Reset
MCLR Reset
WDT Reset
WDT Reset during SLEEP
Brown-out Detect (BOD) Reset

They are not affected by a WDT wake-up, since this is
viewed as the resumption of normal operation. TO and
PD bits are set or cleared differently in different RESET
situations as indicated in Table 9-4. These bits are
used in software to determine the nature of the RESET.
See Table 9-7 for a full description of RESET states of
all registers.
A simplified block diagram of the On-Chip Reset Circuit
is shown in Figure 9-4.
The MCLR Reset path has a noise filter to detect and
ignore small pulses. See Table 12-4 in Electrical
Specifications Section for pulse width specification.
Arch