PBP & 16F690 bug?

[Ron Marcus]

As they are analog by default, i guess it's one of those weird thing it could do. But Why B.5 when the Clock signal apear on B.6.... because of the combination of the external load, Capacitance, TRIS switching AND internal A/D multiplexer i guess... i didn't spend too much time in the datasheet to study how it could happen but if the ANSELH is not cleared, those pin will certainely be analog, not digital as you want.

You know, sometimes it's better to don't know all the reasons and stay happy when it works

It's just weird that they didn't place the ANSEL and ANSELH register in the A/D datasheet section...

I cleared the ANSELH register to 0 and all is right with the world...Thanks for the help.

Ron

[mister_e]

Great to know it's working. It's not often i saw TWO ANSEL registers so.. kinda interesting to know it exist

[Ron Marcus]

An interesting aside to this saga. Jeff from Melabs emailed me back about this quirk. This is important for anyone using Analog inputs with digital outputs. When the uP is commanded to change a bit, it reads, modify,writes the entire port. Since Analog bits are read as zero, when the port is rewritten, any Analog bit will be written as a zero. Even if it was used as a digital high output,as was in my case. Verrrry interesting!

Ron