As they are analog by default, i guess it's one of those weird thing it could do. But Why B.5 when the Clock signal apear on B.6.... because of the combination of the external load, Capacitance, TRIS switching AND internal A/D multiplexer i guess... i didn't spend too much time in the datasheet to study how it could happen but if the ANSELH is not cleared, those pin will certainely be analog, not digital as you want.

You know, sometimes it's better to don't know all the reasons and stay happy when it works

It's just weird that they didn't place the ANSEL and ANSELH register in the A/D datasheet section...